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Abstract
The leitmotif of my talk will be the thesis that past advances in computer architecture continue to be relevant in our field today and
will dictate the future. In that context, I will touch upon how the current AI accelerators are based on the systolic arrays, how the long
vector processors of today are influenced by Cray supercomputers, and how past architecture ideas to support different data formats are reused
for mixed precision support in HPC and for layer-by-layer optimization of energy-efficient AI accelerators.
This talk will describe some of the related contributions of UPC Department of Computer Arcthiecture (DAC) to the scientific community,
especially in the fields of superscalar and vector processors. I will briefly discuss specific UPC DAC contributions which have been
incorporated into current high-performance processors, including supercomputers and accelerators aimed at efficient execution of AI
applications. In the second part of my talk, I will describe the current research topics at the Barcelona Supercomputing Center (BSC), as well as
the chips designed at BSC. Finally, I will conclude with our future vision of how Europe can develop competitive chips based on RISC V to be
used in the design of supercomputers and accelerators for AI in the coming years.
Speaker
Mateo Valero is the Director of the Barcelona Supercomputing Center. His field of research is focused on High Performance Architecture,
and he has published more than 700 articles. His numerous awards include Eckert Mauchly, Seymour Cray, Charles Babbage, Harry H. Goode, ACM
Distinguished Service Award; Two national research awards; The European ICT Program “Hall of Fame”, one of the 25 most influential European
researchers in IT. Recognition of “HPCWire Reader’s Choice Awards” for exceptional leadership in HCP. Member of ten academies and Doctor
Honoris Causa from 11 Universities.
Abstract
With the exponential growth of data, widespread use of AI, and digitization of everything, we've seen an increase in the frequency and sophistication of cyberattacks. While the industry has responded with mitigations and frequent patches, it appears that the security threats are outracing solutions. This talk will focus on novel, long-term approaches, and architecture enhancements to improve the trustworthiness of hardware platforms. Topics include responsibly securing AI models, increasing security in the post-quantum era, and achieving the pinnacle of data privacy with encrypted computing.
Speaker
Sridhar R. Iyengar is a vice president at Intel Labs and the director of security and privacy research at Intel Corporation. He is responsible for innovations in security and privacy that differentiate Intel products and establish trustworthiness as a fundamental value on all Intel platforms. His areas of research include new security architectures and solutions to protect confidentiality, integrity, identity, and privacy. He has earned a bachelor's degree in electrical engineering from the Indian Institute of Technology, Madras, India, and a master's degree in computer science from the University of Wisconsin, Madison.
Title
Panel: Designing Computer Systems for Sustainability
Panel Description
Digital technologies have enabled a plethora of new applications. The dramatic increase in the amount of compute per person has unlocked significant economic growth and improved the quality of many aspects of our lives. Despite the positive societal benefits, as computing becomes increasingly ubiquitous, so does its environmental footprint. This panel provides us the space to examine the environmental implications of computing from the ever-increasing energy use and greenhouse gas (GHG) emissions among others. We will look into the environmental footprint of computing across its overall lifecycle holistically and discuss how the balancing of carbon footprint between operational and embodied carbon opens new directions and development opportunities for a sustainable hardware-software ecosystem. What tools and metrics do we need to enable low-carbon computer systems by putting environmental sustainability as a first design principle? Can and how can we as an industry and research community do more to reduce the environmental impact of computers? What underinvested research directions should the community focus on in order to build environmentally-sustainable computer systems for the next decades to come?
Moderator
Carole-Jean Wu (Meta)
Panelists
Tamar Eilam (IBM Research), Babak Falsafi (EPFL / SDEA), Gage Hills (Harvard University), Bobbie Manne (AMD)
Bio
Tamar Eilam is an IBM Fellow and Chief Scientist for Sustainable Computing in the IBM T. J. Watson Research Center, New York. Tamar is leading research aimed at drastically reducing the carbon footprint associated with computing across infrastructure, systems, and software, data and AI. Tamar completed a Ph.D. degree in Computer Science in the Technion, Israel, in 2000. She joined the IBM T.J. Watson Research Center in New York as a Research Staff Member that same year. She was recognized as an IBM Fellow in 2014.
Babak Falsafi is a Professor in the School of Computer and Communication Sciences, the founding president of Swiss Datacenter Efficiency Association (SDEA) an industrial/academic consortium certifying full-stack efficiency and emissions in datacenter operation, and the founder of EcoCloud, a research center at EPFL investigating sustainable information technology since 2012. He has made numerous contributions to cloud-native technologies including a workload-optimized CPU design that laid the foundation for the first generation of Cavium ARM server CPUs, ThunderX. He is a recipient of an Alfred P. Sloan Research Fellowship, and a Fellow of ACM and IEEE.
Gage Hills is an Assistant Professor of Electrical Engineering in Harvard’s School of Engineering and Applied Sciences (SEAS), where he leads the Nano-Design Research Group. His research focuses on developing energy-efficient and environmentally sustainable computing systems, by combining new technology advances across nanomaterials, devices, sensors, circuits, architectures, and integration techniques. Before Harvard, he finished his PhD at Stanford in 2018 and spent a few years as a post-doc at MIT.
Srilatha (Bobbie) Manne received her PhD in 1999 and has spent over two decades as a computer architect working on the intersection between power and performance. She has worked at industrial research labs and product teams at companies such as Intel, AMD, Cavium, and Microsoft. She has over 30 publications and over 40 patents pending or granted. She is also active in the academic community, serving on PCs for all major architecture conferences and as the General Chair of ISCA 2019. She is currently a Senior Fellow at AMD Research and Advanced Development (RAD), analyzing efficiency and sustainability issues in CPU and GPU designs.
Carole-Jean Wu is a Director at Meta. She is a founding member and a Vice President of MLCommons—a non-profit organization that aims to accelerate machine learning for the benefit of all. Prior to Meta/Facebook, She was a tenured professor at ASU. Dr. Wu's work spans across datacenter infrastructures and edge systems with emphasis on efficiency and sustainability. Her work has been recognized with IEEE Micro Top Picks and ACM/IEEE Best Paper Awards as well as the prestigious NSF CAREER award. She earned her PhD degree from Princeton.
Journey through the glory days of Buenos Aires with a memorable tango show and gala dinner at Tango Porteño, one of Argentina's most renowned tango venues. Shine your shoes!
Abstract
The compute demands of AI and robotics continue to rise due to the rapidly growing volume of data to be processed; the increasingly complex algorithms for higher quality of results; and the demands for energy efficiency and real-time performance. In this talk, we will discuss the design of efficient tailored hardware accelerators and the co-design of algorithms and hardware that reduce the energy consumption while delivering swift real-time and robust performance for applications including deep neural networks, data analytics with sparse tensor algebra, and autonomous navigation. Throughout the talk, we will highlight important design principles, methodologies, and tools that can facilitate an effective design process and various forms of co-design that can broaden the design space.
Speaker
Vivienne Sze is a Professor in the Electrical Engineering and Computer Science Department at MIT. She works on computing systems that enable energy-efficient machine learning, computer vision, and video compression/processing for a wide range of applications, including autonomous navigation, digital health, and the internet of things. Her work has been recognized by various awards, including faculty awards from Google, Facebook, and Qualcomm, the Symposium on VLSI Circuits Best Student Paper Award, the IEEE Custom Integrated Circuits Conference Outstanding Invited Paper Award, the IEEE Micro Top Picks Award and the International Symposium on Performance Analysis of Systems and Software Best Paper Award. As a member of the Joint Collaborative Team on Video Coding, she received the Primetime Engineering Emmy Award for the development of the High-Efficiency Video Coding video compression standard. She is a co-editor of High Efficiency Video Coding (HEVC): Algorithms and Architectures (Springer, 2014) and co-author of Efficient Processing of Deep Neural Networks (Synthesis Lectures on Computer Architecture, Morgan Claypool, 2020). For more information about Prof. Sze's research, please visit http://sze.mit.edu.