The International Symposium on Computer Architecture (ISCA) is the premier forum for new ideas and experimental results in computer architecture. The conference specifically seeks particularly forward-looking and novel submissions. The 53rd edition of ISCA will be held in Raleigh, NC, between June 27 and July 1, 2026.

As with prior ISCAs, there will be a main track and an industry track. For both tracks, the dates, topics, and some review policies are presented here. For additional information on the industry track, please see the industry track call for papers.

Submission Guidelines

HotCRP Upload TBD

Important Dates

All deadlines occur on the given date(s) at 11:59 PM AoE.

Main Track Industry Track
Abstract Deadline November 10, 2025 December 5, 2025
Full Paper Deadline November 17, 2025 December 12, 2025
Round 1 Reviews Due December 19, 2025 February 6, 2026
Round 2 Reviews Due February 13, 2026 n/a
Rebuttal/Revision Period February 16 – March 6, 2026 February 16 – 27, 2026

(no revisions)

Decisions Released March 27, 2026 March 27, 2026

ISCA-53 will be conducting Artifact Evaluation. Authors of accepted papers are encouraged to submit their artifacts for evaluation.


New Policies Regarding Expected Reviewer Service for Authors

To keep high review quality and ensure a productive and pleasant reviewer experience in anticipation of increasing paper submissions, for ISCA-53, we are initiating two new expectations for authors.

PC Service for Authors Submitting More than 6 Abstracts

Any senior author (i.e., holding a PhD or having equivalent level of seniority) registering more than 6 abstracts (regardless of whether any of those abstracts are later withdrawn) may be called upon to serve on the PC and cannot decline. Another other senior author may be nominated in place. Final decisions on this matter will be at the discretion of the PC chairs.

Reserve Reviewers

To prepare for the possibility of a higher volume of submissions, we expect at least one senior author (as defined above) per paper must register as a reserve reviewer (unless exempt under the criteria below). [We thank the OOPSLA program chairs for piloting this practice!]

The goal of this policy is to uphold the high standard of reviews within the TCCA/SIGARCH/SIGMICRO/TCMM community. To achieve this, we must ensure manageable review loads, prevent burnout, and encourage reviewers to stay engaged for future rounds. High-quality reviews are one of the community’s greatest assets, playing a crucial role in elevating the quality of research for everyone.

Our hope is that these reserve reviewers won’t be needed at all! They will only be called upon as ad hoc reviewers if our projections fall significantly short. Even in that case, their review load will be far lighter than that of LPC members, and we will do our best to assign papers that closely match expertise. Those selected to serve as a reviewer will be acknowledged in the proceedings.

When registering a paper in HotCRP, the form will include a field for the designated reserve reviewer. After the final paper submission, we will notify reserve reviewers if their reviewing services will be needed, and they will be expected to enter their areas of expertise in HotCRP in a timely fashion and update their COIs.

We define “senior” authors as those who completed their PhD, or equivalent industry experience. A paper is exempt from the reserve reviewer policy if:

  • The paper has no senior authors.
  • At least one senior author is already on the program committee.
  • At least one senior author is subject to the 6-abstract criterion above.
  • Every senior author of the paper satisfies one or more of these criteria:
    • Has never published in a conference sponsored by TCCA, TCMM, SIGARCH, or SIGMICRO.
    • Is (co)chairing a TCCA, TCMM, SIGRACH, or SIGMICRO conference with 150 or more submissions last year, this year, or next year.
    • Has some other exceptional circumstance that didn’t prevent writing the paper but prevents doing any reviewing. This must be cleared at least three days before submission with the PC Chairs.

It is okay for the same person to serve as the reserve reviewer for more than one paper. Please enter their information for each such paper (preferably identically). For cases in which a paper is exempt according to the above criteria, please enter “exempt” in the reserve reviewer field.

Note that these policies mean that authorship cannot be changed after abstract registration and we require paper titles to be finalized at the paper registration time. We hope this will reduce abuse of the abstract registration process to register ghost/placeholder papers.


Topics

Papers are solicited on a broad range of topics, including (but not limited to):

  • Processor, memory, and storage systems architecture
  • Parallelism: instruction, thread, data, multiprocessor
  • Datacenter-scale computing
  • IoT, mobile, edge, and embedded architecture
  • Verification, testing, and correctness
  • Interconnection networks, routers, and network interface architectures
  • Power and energy
  • Sustainable computing
  • Architectures for emerging applications including machine learning and bioinformatics
  • Architectural support for programming languages or software development
  • Architectural support for interfacing with accelerators
  • Architectural support for security, virtual memory, and virtualization
  • Dependable processor and system architecture
  • Architectures for emerging technologies including novel circuits, memory technologies, etc.
  • Quantum computer architecture
  • Architecture modeling, simulation methodologies, and tools
  • Evaluation and measurement of real computing systems
  • Human factors and user studies

Organizers

  • General Co-Chairs: James Tuck (North Carolina State University) and Huiyang Zhou (North Carolina State University)
  • Program Co-Chairs: Kevin Skadron (University of Virginia) and Carole-Jean Wu (Meta)
  • Program Chair (Industry Track): Brad Beckmann (AMD)